program_mult.go 10 KB

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  1. // Aplica o back-end do juninho
  2. @target : mips
  3. // Especifica o tipo de metodo empregado para salvar o resultado da compilação
  4. //@export : MultCoreJun
  5. @export : simulation
  6. package main;
  7. const (
  8. LIN = 2
  9. COL = 2
  10. )
  11. var (
  12. matrizA [LIN][COL]int32
  13. matrizB [LIN][COL]int32
  14. matrizR [LIN][COL]int32
  15. )
  16. func preenche(){
  17. var k = 1
  18. for i := 0; i < LIN ; i++ {
  19. for j := 0; j < COL ; j++ {
  20. matrizA[i][j] = k
  21. matrizB[i][j] = k
  22. k++
  23. }
  24. }
  25. }
  26. func multiplica() {
  27. var aux = 0
  28. for i := 0; i < LIN; i++ {
  29. for j := 0; j < COL; j++ {
  30. for k := 0; k < LIN; k++ {
  31. aux = aux + (matrizA[i][k] * matrizB[k][j])
  32. }
  33. matrizR[i][j] = aux
  34. aux = 0
  35. }
  36. }
  37. }
  38. func main() {
  39. preenche()
  40. multiplica()
  41. }
  42. /**
  43. alloc (int32), 4 _G13 T< alloc >
  44. alloc (int32), 4 _G18 T< alloc >
  45. alloc (int32), 4 _G54 T< alloc >
  46. <main>:
  47. 0: 0: call <preenche> T< call >
  48. 1: 1: call <multiplica> T< call >
  49. <main-end>:
  50. <preenche>:
  51. alloc (int32), 1 _VJ5 T< alloc >
  52. alloc (int32), 1 _VI3 T< alloc >
  53. alloc (int32), 1 _VK1 T< alloc >
  54. 2: 0: store (int32) _VK1, 1 T< store >
  55. 3: 1: store (int32) _VI3, 0 T< store >
  56. 4: 2: goto <preenche+_i3> T< jump >
  57. <preenche+_i0>:
  58. 5: 3: store (int32) _VJ5, 0 T< store >
  59. 6: 4: goto <preenche+_i7> T< jump >
  60. <preenche+_i4>:
  61. 7: 5: load (int32) _VI3, _S8 --Copy value of index T< load >
  62. 8: 6: _T9 := _S8 << 1 T< assign >
  63. 9: 7: load (int32) _VJ5, _S10 --Copy value of index T< load >
  64. 10: 8: _T9 := _T9 + _S10 --colls shift T< assign >
  65. 11: 9: _T12 := _T9 << 2 T< assign >
  66. 12: 10: load (int32) _VK1, _S7 --Load param (_S7) T< load >
  67. 13: 11: store (int32) _G13[_T12], _S7 T< store >
  68. 14: 12: _S8 := _S8 --Copy value of index T< copy >
  69. 15: 13: store (int32) _VI3, _S8 T< store >
  70. 16: 14: _T15 := _S8 << 1 T< assign >
  71. 17: 15: _S10 := _S10 --Copy value of index T< copy >
  72. 18: 16: store (int32) _VJ5, _S10 T< store >
  73. 19: 17: _T15 := _T15 + _S10 --colls shift T< assign >
  74. 20: 18: _T17 := _T15 << 2 T< assign >
  75. 21: 19: store (int32) _G18[_T17], _S7 T< store >
  76. 22: 20: _S7 := _S7 + 1 T< assign >
  77. 23: 21: store (int32) _VK1, _S7 T< store >
  78. 24: 22: _S10 := _S10 + 1 T< assign >
  79. 25: 23: store (int32) _VJ5, _S10 T< store >
  80. <preenche+_i7>:
  81. 26: 24: load (int32) _VJ5, _S20 --Load param (_S20) T< load >
  82. 27: 25: if _S20 < 2 goto <preenche+_i4> T< branch >
  83. 28: 26: load (int32) _VI3, _S21 --Load param (_S21) T< load >
  84. 29: 27: _S21 := _S21 + 1 T< assign >
  85. 30: 28: store (int32) _VI3, _S21 T< store >
  86. <preenche+_i3>:
  87. 31: 29: load (int32) _VI3, _S22 --Load param (_S22) T< load >
  88. 32: 30: if _S22 < 2 goto <preenche+_i0> T< branch >
  89. <preenche-end>:
  90. <multiplica>:
  91. alloc (int32), 1 _VK29 T< alloc >
  92. alloc (int32), 1 _VJ27 T< alloc >
  93. alloc (int32), 1 _VI25 T< alloc >
  94. alloc (int32), 1 _VAUX23 T< alloc >
  95. 33: 0: store (int32) _VAUX23, 0 T< store >
  96. 34: 1: store (int32) _VI25, 0 T< store >
  97. 35: 2: goto <multiplica+_i11> T< jump >
  98. <multiplica+_i8>:
  99. 36: 3: store (int32) _VJ27, 0 T< store >
  100. 37: 4: goto <multiplica+_i15> T< jump >
  101. <multiplica+_i12>:
  102. 38: 5: store (int32) _VK29, 0 T< store >
  103. 39: 6: goto <multiplica+_i19> T< jump >
  104. <multiplica+_i16>:
  105. 40: 7: load (int32) _VI25, _S32 --Copy value of index T< load >
  106. 41: 8: _T33 := _S32 << 1 T< assign >
  107. 42: 9: load (int32) _VK29, _S34 --Copy value of index T< load >
  108. 43: 10: _T33 := _T33 + _S34 --colls shift T< assign >
  109. 44: 11: _T36 := _T33 << 2 T< assign >
  110. 45: 12: load (int32) _G13[_T36], _T38 T< load >
  111. 46: 13: _S34 := _S34 --Copy value of index T< copy >
  112. 47: 14: store (int32) _VK29, _S34 T< store >
  113. 48: 15: _T39 := _S34 << 1 T< assign >
  114. 49: 16: load (int32) _VJ27, _S40 --Copy value of index T< load >
  115. 50: 17: _T39 := _T39 + _S40 --colls shift T< assign >
  116. 51: 18: _T42 := _T39 << 2 T< assign >
  117. 52: 19: load (int32) _G18[_T42], _T44 T< load >
  118. 53: 20: _T45 := _T38 * _T44 T< assign >
  119. 54: 21: load (int32) _VAUX23, _S31 --Load param (_S31) T< load >
  120. 55: 22: _T46 := _S31 + _T45 T< assign >
  121. 56: 23: store (int32) _VAUX23, _T46 T< store >
  122. 57: 24: _S34 := _S34 + 1 T< assign >
  123. 58: 25: store (int32) _VK29, _S34 T< store >
  124. <multiplica+_i19>:
  125. 59: 26: load (int32) _VK29, _S47 --Load param (_S47) T< load >
  126. 60: 27: if _S47 < 2 goto <multiplica+_i16> T< branch >
  127. 61: 28: load (int32) _VI25, _S49 --Copy value of index T< load >
  128. 62: 29: _T50 := _S49 << 1 T< assign >
  129. 63: 30: load (int32) _VJ27, _S51 --Copy value of index T< load >
  130. 64: 31: _T50 := _T50 + _S51 --colls shift T< assign >
  131. 65: 32: _T53 := _T50 << 2 T< assign >
  132. 66: 33: load (int32) _VAUX23, _S48 --Load param (_S48) T< load >
  133. 67: 34: store (int32) _G54[_T53], _S48 T< store >
  134. 68: 35: store (int32) _VAUX23, 0 T< store >
  135. 69: 36: _S51 := _S51 + 1 T< assign >
  136. 70: 37: store (int32) _VJ27, _S51 T< store >
  137. <multiplica+_i15>:
  138. 71: 38: load (int32) _VJ27, _S56 --Load param (_S56) T< load >
  139. 72: 39: if _S56 < 2 goto <multiplica+_i12> T< branch >
  140. 73: 40: load (int32) _VI25, _S57 --Load param (_S57) T< load >
  141. 74: 41: _S57 := _S57 + 1 T< assign >
  142. 75: 42: store (int32) _VI25, _S57 T< store >
  143. <multiplica+_i11>:
  144. 76: 43: load (int32) _VI25, _S58 --Load param (_S58) T< load >
  145. 77: 44: if _S58 < 2 goto <multiplica+_i8> T< branch >
  146. <multiplica-end>:
  147. ec: 0666763248 addiu sp,sp,-16 -- prolog| push stack frame
  148. f0: 0001962017 addu fp,zero,sp -- prolog|copy fp ← sp
  149. f4: 2948595712 sw zero,0(fp) .0 -- store content of zero in _VAUX23
  150. f8: 2948595716 sw zero,4(fp) .1 -- store content of zero in _VI25
  151. fc: 0134217855 j 1fc <multiplica+0x110> .2 -- jump to multiplica+_i11
  152. 100: 0000000000 sll zero,zero,0 .2 -- Nop
  153. 104: 2948595720 sw zero,8(fp) .3 -- store content of zero in _VJ27
  154. 108: 0134217844 j 1d0 <multiplica+0xe4> .4 -- jump to multiplica+_i15
  155. 10c: 0000000000 sll zero,zero,0 .4 -- Nop
  156. 110: 2948595724 sw zero,12(fp) .5 -- store content of zero in _VK29
  157. 114: 0134217824 j 180 <multiplica+0x94> .6 -- jump to multiplica+_i19
  158. 118: 0000000000 sll zero,zero,0 .6 -- Nop
  159. 11c: 2413101060 lw s5,4(fp) .7 -- load content from _VI25 in s5
  160. 120: 0000000000 sll zero,zero,0 .7 -- Nop
  161. 124: 0001400896 sll t4,s5,1 .8 -- _T33 = _S32 << 1
  162. 128: 2413232140 lw s7,12(fp) .9 -- load content from _VK29 in s7
  163. 12c: 0000000000 sll zero,zero,0 .9 -- Nop
  164. 130: 0026697761 addu t4,t4,s7 .10 -- _T33 = _T33 + _S34
  165. 134: 0000813184 sll t5,t4,2 .11 -- _T36 = _T33 << 2
  166. 138: 2377580544 lw s7,0(t5) .12 -- load content from _G13[_T36] in t6
  167. 13c: 2950103052 sw s7,12(fp) .14 -- store content of s7 in _VK29
  168. 140: 0001538112 sll t7,s7,1 .15 -- _T39 = _S34 << 1
  169. 144: 2412904456 lw s2,8(fp) .16 -- load content from _VJ27 in s2
  170. 148: 0000000000 sll zero,zero,0 .16 -- Nop
  171. 14c: 0032667681 addu t7,t7,s2 .17 -- _T39 = _T39 + _S40
  172. 150: 0001032320 sll t8,t7,2 .18 -- _T42 = _T39 << 2
  173. 154: 2399666192 lw t0,16(t8) .19 -- load content from _G18[_T42] in t0
  174. 158: 0000000000 sll zero,zero,0 .19 -- Nop
  175. 15c: 0029902872 mult t6,t0 .20 -- _T45 = _T38 * _T44
  176. 160: 0000018450 mflo t1 .20
  177. 164: 2413101056 lw s5,0(fp) .21 -- load content from _VAUX23 in s5
  178. 168: 0000000000 sll zero,zero,0 .21 -- Nop
  179. 16c: 0044650529 addu t2,s5,t1 .22 -- _T46 = _S31 + _T45
  180. 170: 2949251072 sw t2,0(fp) .23 -- store content of t2 in _VAUX23
  181. 174: 0604700673 addiu t3,zero,1 .24 -- load param (p2)
  182. 178: 0653721601 addiu s7,s7,1 .24 -- _S34 = _S34 + 1
  183. 17c: 2950103052 sw s7,12(fp) .25 -- store content of s7 in _VK29
  184. 180: 2412838924 lw s1,12(fp) .26 -- load content from _VK29 in s1
  185. 184: 0000000000 sll zero,zero,0 .26 -- Nop
  186. 188: 0604766210 addiu t4,zero,2 .27 -- load param (p2)
  187. 18c: 0036442147 subu v0,s1,t4 .27
  188. 190: 0071368674 bltz v0,11c <multiplica+0x30> .27 -- branch if register < 0
  189. 194: 0000000000 sll zero,zero,0 .27 -- Nop
  190. 198: 2412969988 lw s3,4(fp) .28 -- load content from _VI25 in s3
  191. 19c: 0000000000 sll zero,zero,0 .28 -- Nop
  192. 1a0: 0001271872 sll t5,s3,1 .29 -- _T50 = _S49 << 1
  193. 1a4: 2413035528 lw s4,8(fp) .30 -- load content from _VJ27 in s4
  194. 1a8: 0000000000 sll zero,zero,0 .30 -- Nop
  195. 1ac: 0028600353 addu t5,t5,s4 .31 -- _T50 = _T50 + _S51
  196. 1b0: 0000882816 sll t7,t5,2 .32 -- _T53 = _T50 << 2
  197. 1b4: 2413166592 lw s6,0(fp) .33 -- load content from _VAUX23 in s6
  198. 1b8: 0000000000 sll zero,zero,0 .33 -- Nop
  199. 1bc: 2918580256 sw s6,32(t7) .34 -- store content of s6 in _G54[_T53]
  200. 1c0: 2948595712 sw zero,0(fp) .35 -- store content of zero in _VAUX23
  201. 1c4: 0604897281 addiu t6,zero,1 .36 -- load param (p2)
  202. 1c8: 0647233537 addiu s4,s4,1 .36 -- _S51 = _S51 + 1
  203. 1cc: 2949906440 sw s4,8(fp) .37 -- store content of s4 in _VJ27
  204. 1d0: 2412904456 lw s2,8(fp) .38 -- load content from _VJ27 in s2
  205. 1d4: 0000000000 sll zero,zero,0 .38 -- Nop
  206. 1d8: 0604504066 addiu t0,zero,2 .39 -- load param (p2)
  207. 1dc: 0038277155 subu v0,s2,t0 .39
  208. 1e0: 0071368651 bltz v0,110 <multiplica+0x24> .39 -- branch if register < 0
  209. 1e4: 0000000000 sll zero,zero,0 .39 -- Nop
  210. 1e8: 2413166596 lw s6,4(fp) .40 -- load content from _VI25 in s6
  211. 1ec: 0000000000 sll zero,zero,0 .40 -- Nop
  212. 1f0: 0604569601 addiu t1,zero,1 .41 -- load param (p2)
  213. 1f4: 0651558913 addiu s6,s6,1 .41 -- _S57 = _S57 + 1
  214. 1f8: 2950037508 sw s6,4(fp) .42 -- store content of s6 in _VI25
  215. 1fc: 2413232132 lw s7,4(fp) .43 -- load content from _VI25 in s7
  216. 200: 0000000000 sll zero,zero,0 .43 -- Nop
  217. 204: 0604635138 addiu t2,zero,2 .44 -- load param (p2)
  218. 208: 0048893987 subu v0,s7,t2 .44
  219. 20c: 0071368637 bltz v0,104 <multiplica+0x18> .44 -- branch if register < 0
  220. 210: 0000000000 sll zero,zero,0 .44 -- Nop
  221. 214: 0666697744 addiu sp,sp,16 -- epilog| pop stack frame
  222. 218: 0001962017 addu fp,zero,sp -- epilog| pop stack frame
  223. 21c: 0065011720 jr ra -- epilog| return
  224. */