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- -- Copyright (C) 1991-2014 Altera Corporation. All rights reserved.
- -- Your use of Altera Corporation's design tools, logic functions
- -- and other software and tools, and its AMPP partner logic
- -- functions, and any output files from any of the foregoing
- -- (including device programming or simulation files), and any
- -- associated documentation or information are expressly subject
- -- to the terms and conditions of the Altera Program License
- -- Subscription Agreement, the Altera Quartus II License Agreement,
- -- the Altera MegaCore Function License Agreement, or other
- -- (including device programming or simulation files), and any
- -- applicable license agreement, including, without limitation,
- -- that your use is for the sole purpose of programming logic
- -- devices manufactured by Altera and sold by Altera or its
- -- authorized distributors. Please refer to the applicable
- -- agreement for further details.
- -- Quartus II generated Memory Initialization File (.mif)
- WIDTH = 32;
- DEPTH = 16384;
- ADDRESS_RADIX = DEC;
- DATA_RADIX = BIN;
- CONTENT
- BEGIN
- [4..124]: 00000000000000000000000000000000;
- 00128: 00000000000000001001110110101111; % dec 40367 %
- [132..16348]: 00000000000000000000000000000000;
- 16352: 00000000000000000100100100111110; % dec 18750 %
- 16356: 00000000000000000000000000000001; % dec 1 %
- 16360: 00000000000000001001110110101111; % dec 40367 %
- 16364: 00000000000000000000000000000000; % dec 0 %
- 16368: 00000000000000101001101111111000; % dec 171000 %
- 16372: 00000000000000000101101011010010; % dec 23250 %
- 16376: 00000000000000000000000000001100; % dec 12 %
- 16380: 00000000000000000000000000000000; % dec 0 %
- END;
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