ivannosys3/src/compiler/IVANNOSYS.java

package compiler;

/*
 Verificar operacao unaria negacao valor em laco
 * To change this license header, choose License Headers in Project Properties.
 * To change this template file, choose Tools | Templates
 * and open the template in the editor.
 */
import API.Api;
import API.BuildParams;
import API.Middleware;
import API.Target;
import Export.MultCoreJun;
import Export.Simulation;
import IntermediaryCode.IRGenerator;
import java.util.logging.Level;
import java.util.logging.Logger;
import targets.mips.Translate;

/**
 *
 * @author Eugenio
 */
public class IVANNOSYS {

    protected static IvannosysCompiler COM;

    /**
     * @param args the command line arguments
     */
    public static void main(String[] args) throws Exception {

        try {
            String cmd = "", file = "";

            if (args.length > 0) {
                cmd = args[0];
            }
            switch (cmd) {
                case "create":
                    break;
                default:
//                    Middleware.Add("mips.analise", new analise.AnaliseDependenciaMiddleware());
//                    Middleware.Add("mips.module.scheduling", new analise.ModuleSchedulingMiddleware());

                    COM = new IvannosysCompiler(
                            "UTF-8",
                            IvannosysCompiler.INPUT_FILE)
                            .include(".\\src\\samples")
                            .include(".\\src\\libs")
                            // Especifica a classe de geração de codigo de tres enderecos
                            .IRGenerator(new IRGenerator());
                    // Extensao dos arquivos 
//                            .setExtensionLibrary(".go");

                    // Inicializa a api do compilador
                    Api.Init(COM);

                    // Parametros de compilação
                    BuildParams.Add("display.ERROS", "true");
                    BuildParams.Add("display.IR", "true");
                    BuildParams.Add("display.AST", "true");
                    BuildParams.Add("mode", "developement");

                    Simulation simulator = new Simulation(new tools.mips.MipsSettings() {
                        {
                            // Não executar passo a passo
//                            Set("step.by.step", "true");
                            // Necessario para poder usar os breakpoints
//                            Set("mode", "debug");
// Determina os pontos de para no codigo alvo
//                            Set("breakpoints", "104,10c,30c,300,22c");
//                            Set("breakpoints", "104,110");
//                            Set("breakpoints", "108,110,114,37c,280,294");
//                            Set("breakpoints", "5c,cc,154,1c0");

// Caminho do arquivo de memoria de instrucoes
                            Set("memory.instruction", "\\src\\tools\\mips\\memory\\mi.memory");
// Tamanho da memorua de instrucoes 16 kb
                            Set("memory.instruction.size", 16 * 1024);
// Caminho do arquivo de memoria de dados
                            Set("memory.data", "\\src\\tools\\mips\\memory\\md.memory");
// Tamanho da memorua de dados 16 kb
                            Set("memory.data.size", 16 * 1024);
                            Set("memory.data.reset", "true");
                        }
                    });

                    MultCoreJun JunExport = new MultCoreJun();
                    // Especifica a classe de geração de código alvo mips
                    Translate Mips = new targets.mips.Translate();
                    // Adiciona dois metodos de exportação ao alvo mips 
                    // Metodo de simualcao
                    Mips.AddExportOption("simulation", simulator);
                    // Metodo exporta profile para arquitetura de juninho
                    Mips.AddExportOption("MultCoreJun", JunExport);

                    Target.Add("mips", Mips);

                    Mips = new targets.mips.TranslateJun();
                    // Adiciona dois metodos de exportação ao alvo mips 
                    // Metodo de simualcao
                    Mips.AddExportOption("simulation", simulator);
                    // Metodo exporta profile para arquitetura de juninho
                    Mips.AddExportOption("MultCoreJun", JunExport);

                    Target.Add("mipsjun", Mips);

                    // Registra os processadores para o alvo mips
                    // Executa alocacao de registradores antes de traduzir cada bloco
                    Middleware.On("mips", "before.translate.block", "mips.register.alloc");
//                    Middleware.On("mips", "after.translate.block", "mips.o.L1,mips.copy.dep");
                    Middleware.On("mips", "after.translate.block", "mips.copy.dep");
                    // Atualiza os enderecos de saltos e set no campo offset
//                    Middleware.On("mips", "after.translate", "mips.update.address,mips.analise,mips.module.scheduling");
//                    Middleware.On("mips", "after.translate", "mips.update.address,mips.module.scheduling");
                    Middleware.On("mips", "after.translate", "mips.update.address");

                    // cmd = "src\\samples\\program.go";
                    // cmd = "src\\samples\\program.go";
                    // cmd = "src\\samples\\program_mult_jon.go";
//                    cmd = "src\\samples\\program_mult.go";
//                    cmd = "src\\samples\\program_jun_bit_count.go";
//                    cmd = "src\\samples\\program_jun_bit_count_1.go";
//                    cmd = "src\\samples\\program_jun_lu.go";
                    cmd = "src\\samples\\program_jun_quick.go";
//                    cmd = "src\\samples\\program_jun_laplaciano.go";
//                    cmd = "src\\samples\\program_jun_bytes.go";
//                    cmd = "src\\samples\\program_jun_mult_manycore.go";
                    // Compila o arquivo de entrada
                    COM.Compile(cmd);
            }

        } catch (Exception ex) {
            Logger.getLogger(IVANNOSYS.class.getName()).log(Level.SEVERE, null, ex);
        }
    }
}


/*
		<main>:
  0:  0604504068	addiu t0,zero,4		.0 -- load param (p1)
  4:  2886205440	sw t0,0(zero)		.0 -- store content of t0 in _G1[0]
  8:  0604569603	addiu t1,zero,3		.1 -- load param (p1)
  c:  2886270980	sw t1,4(zero)		.1 -- store content of t1 in _G1[4]
 10:  0604635141	addiu t2,zero,5		.2 -- load param (p1)
 14:  2886336520	sw t2,8(zero)		.2 -- store content of t2 in _G1[8]
 18:  0604700674	addiu t3,zero,2		.3 -- load param (p1)
 1c:  2886402060	sw t3,12(zero)		.3 -- store content of t3 in _G1[12]
 20:  0604766209	addiu t4,zero,1		.4 -- load param (p1)
 24:  2886467600	sw t4,16(zero)		.4 -- store content of t4 in _G1[16]
 28:  0604831747	addiu t5,zero,3		.5 -- load param (p1)
 2c:  2886533140	sw t5,20(zero)		.5 -- store content of t5 in _G1[20]
 30:  0604897282	addiu t6,zero,2		.6 -- load param (p1)
 34:  2886598680	sw t6,24(zero)		.6 -- store content of t6 in _G1[24]
 38:  0604962819	addiu t7,zero,3		.7 -- load param (p1)
 3c:  2886664220	sw t7,28(zero)		.7 -- store content of t7 in _G1[28]
 40:  0604241920	addiu a0,zero,0		.10 -- push param
 44:  0604307463	addiu a1,zero,7		.10 -- push param
 48:  0201326613	jal 54 <quickSortIterative+0x0>		.10 -- jump to <quickSortIterative>
 4c:  0000000000	sll zero,zero,0		.10 -- Nop
 50:  4294967295	stop 		 -- End of programa
		<quickSortIterative>:
 54:  0666763208	addiu sp,sp,-56		 -- prolog| push stack frame
 58:  2948464688	sw fp,48(sp)		 -- prolog| backup fp
 5c:  2948530228	sw ra,52(sp)		 -- prolog| backup ra
 60:  0001962017	addu fp,zero,sp		 -- prolog|copy fp ← sp
 64:  2948857856	sw a0,0(fp)		.0 -- pop param
 68:  2948923396	sw a1,4(fp)		.1 -- pop param
 6c:  2412969992	lw s3,8(fp)		.2 -- load content from _VTOP7 in s3
 70:  0000000000	sll zero,zero,0		.2 -- Nop
 74:  0001261696	sll t0,s3,2		.3 -- _T10 = _S8 << 2
 78:  2413035520	lw s4,0(fp)		.4 -- load content from _VL3 in s4
 7c:  0000000000	sll zero,zero,0		.4 -- Nop
 80:  0018759713	addu t0,t0,fp		.5
 84:  2903769100	sw s4,12(t0)		.5 -- store content of s4 in _VSTACK11[_T10]
 88:  0645070849	addiu s3,s3,1		.6 -- _S8 = _S8 + 1
 8c:  2949840904	sw s3,8(fp)		.7 -- store content of s3 in _VTOP7
 90:  0001284129	addu s3,zero,s3		.8 -- copy _S8 ← _S8
 94:  2949840904	sw s3,8(fp)		.9 -- store content of s3 in _VTOP7
 98:  0001265792	sll t2,s3,2		.10 -- _T14 = _S8 << 2
 9c:  2413166596	lw s6,4(fp)		.11 -- load content from _VH5 in s6
 a0:  0000000000	sll zero,zero,0		.11 -- Nop
 a4:  0022958113	addu t2,t2,fp		.12
 a8:  2908094476	sw s6,12(t2)		.12 -- store content of s6 in _VSTACK11[_T14]
 ac:  0134217857	j 204 <quickSortIterative+0x1b0>		.13 -- jump to quickSortIterative+_i3
 b0:  0000000000	sll zero,zero,0		.13 -- Nop
 b4:  2413035528	lw s4,8(fp)		.14 -- load content from _VTOP7 in s4
 b8:  0000000000	sll zero,zero,0		.14 -- Nop
 bc:  0001333376	sll t3,s4,2		.15 -- _T17 = _S15 << 2
 c0:  2372665356	lw t4,12(t3)		.16 -- load content from _VSTACK11[_T17] in t4
 c4:  0000000000	sll zero,zero,0		.16 -- Nop
 c8:  2949382148	sw t4,4(fp)		.17 -- store content of t4 in _VH5
 cc:  0647299071	addiu s4,s4,-1		.18 -- _S15 = _S15 - 1
 d0:  2949906440	sw s4,8(fp)		.19 -- store content of s4 in _VTOP7
 d4:  0001351713	addu s4,zero,s4		.20 -- copy _S15 ← _S15
 d8:  2949906440	sw s4,8(fp)		.21 -- store content of s4 in _VTOP7
 dc:  0001339520	sll t6,s4,2		.22 -- _T22 = _S15 << 2
 e0:  2379153420	lw t7,12(t6)		.23 -- load content from _VSTACK11[_T22] in t7
 e4:  0000000000	sll zero,zero,0		.23 -- Nop
 e8:  2949578752	sw t7,0(fp)		.24 -- store content of t7 in _VL3
 ec:  0647299071	addiu s4,s4,-1		.25 -- _S15 = _S15 - 1
 f0:  2949906440	sw s4,8(fp)		.26 -- store content of s4 in _VTOP7
 f4:  2413166592	lw s6,0(fp)		.27 -- load content from _VL3 in s6
 f8:  0000000000	sll zero,zero,0		.27 -- Nop
 fc:  2413232132	lw s7,4(fp)		.29 -- load content from _VH5 in s7
100:  0000000000	sll zero,zero,0		.29 -- Nop
104:  0001450017	addu a0,zero,s6		.31 -- push param
108:  0001517601	addu a1,zero,s7		.31 -- push param
10c:  0201326733	jal 234 <partition+0x0>		.31 -- jump to <partition>
110:  0000000000	sll zero,zero,0		.31 -- Nop
114:  0000147489	addu t0,zero,v0		.32 -- copy t0 ← v0
118:  2949120044	sw t0,44(fp)		.33 -- store content of t0 in _VP83
11c:  2412970028	lw s3,44(fp)		.34 -- load content from _VP83 in s3
120:  0000000000	sll zero,zero,0		.34 -- Nop
124:  0644546559	addiu t2,s3,-1		.35 -- _T85 = _S84 - 1
128:  2412773376	lw s0,0(fp)		.36 -- load content from _VL3 in s0
12c:  0000000000	sll zero,zero,0		.36 -- Nop
130:  0022024234	slt v0,t2,s0		.37
134:  0339738646	bne zero,v0,190 <quickSortIterative+0x13c>		.37 -- branch if not equals
138:  0000000000	sll zero,zero,0		.37 -- Nop
13c:  2413166600	lw s6,8(fp)		.38 -- load content from _VTOP7 in s6
140:  0000000000	sll zero,zero,0		.38 -- Nop
144:  0651558913	addiu s6,s6,1		.39 -- _S87 = _S87 + 1
148:  2950037512	sw s6,8(fp)		.40 -- store content of s6 in _VTOP7
14c:  0001486881	addu s6,zero,s6		.41 -- copy _S87 ← _S87
150:  2950037512	sw s6,8(fp)		.42 -- store content of s6 in _VTOP7
154:  0001466496	sll t4,s6,2		.43 -- _T90 = _S87 << 2
158:  2413232128	lw s7,0(fp)		.44 -- load content from _VL3 in s7
15c:  0000000000	sll zero,zero,0		.44 -- Nop
160:  0027156513	addu t4,t4,fp		.45
164:  2912354316	sw s7,12(t4)		.45 -- store content of s7 in _VSTACK11[_T90]
168:  0651558913	addiu s6,s6,1		.46 -- _S87 = _S87 + 1
16c:  2950037512	sw s6,8(fp)		.47 -- store content of s6 in _VTOP7
170:  2413035564	lw s4,44(fp)		.48 -- load content from _VP83 in s4
174:  0000000000	sll zero,zero,0		.48 -- Nop
178:  0646971391	addiu t7,s4,-1		.49 -- _T93 = _S92 - 1
17c:  0001486881	addu s6,zero,s6		.50 -- copy _S87 ← _S87
180:  2950037512	sw s6,8(fp)		.51 -- store content of s6 in _VTOP7
184:  0001491072	sll t8,s6,2		.52 -- _T95 = _S87 << 2
188:  0052346913	addu t8,t8,fp		.53
18c:  2936995852	sw t7,12(t8)		.53 -- store content of t7 in _VSTACK11[_T95]
190:  2413232172	lw s7,44(fp)		.54 -- load content from _VP83 in s7
194:  0000000000	sll zero,zero,0		.54 -- Nop
198:  0652804097	addiu t1,s7,1		.55 -- _T97 = _S96 + 1
19c:  2412969988	lw s3,4(fp)		.56 -- load content from _VH5 in s3
1a0:  0000000000	sll zero,zero,0		.56 -- Nop
1a4:  0020123683	subu v0,t1,s3		.57
1a8:  0071368726	bgez v0,204 <quickSortIterative+0x1b0>		.57 -- branch if register >= 0
1ac:  0000000000	sll zero,zero,0		.57 -- Nop
1b0:  2412838920	lw s1,8(fp)		.58 -- load content from _VTOP7 in s1
1b4:  0000000000	sll zero,zero,0		.58 -- Nop
1b8:  0640745473	addiu s1,s1,1		.59 -- _S99 = _S99 + 1
1bc:  2949709832	sw s1,8(fp)		.60 -- store content of s1 in _VTOP7
1c0:  2412773420	lw s0,44(fp)		.61 -- load content from _VP83 in s0
1c4:  0000000000	sll zero,zero,0		.61 -- Nop
1c8:  0638320641	addiu t4,s0,1		.62 -- _T101 = _S100 + 1
1cc:  0001148961	addu s1,zero,s1		.63 -- copy _S99 ← _S99
1d0:  2949709832	sw s1,8(fp)		.64 -- store content of s1 in _VTOP7
1d4:  0001140864	sll t5,s1,2		.65 -- _T103 = _S99 << 2
1d8:  0029255713	addu t5,t5,fp		.66
1dc:  2913730572	sw t4,12(t5)		.66 -- store content of t4 in _VSTACK11[_T103]
1e0:  0640745473	addiu s1,s1,1		.67 -- _S99 = _S99 + 1
1e4:  2949709832	sw s1,8(fp)		.68 -- store content of s1 in _VTOP7
1e8:  0001148961	addu s1,zero,s1		.69 -- copy _S99 ← _S99
1ec:  2949709832	sw s1,8(fp)		.70 -- store content of s1 in _VTOP7
1f0:  0001144960	sll t7,s1,2		.71 -- _T107 = _S99 << 2
1f4:  2413101060	lw s5,4(fp)		.72 -- load content from _VH5 in s5
1f8:  0000000000	sll zero,zero,0		.72 -- Nop
1fc:  0033454113	addu t7,t7,fp		.73
200:  2918514700	sw s5,12(t7)		.73 -- store content of s5 in _VSTACK11[_T107]
204:  2412773384	lw s0,8(fp)		.74 -- load content from _VTOP7 in s0
208:  0000000000	sll zero,zero,0		.74 -- Nop
20c:  0033558563	subu v0,s0,zero		.75
210:  0071434152	bgez v0,b4 <quickSortIterative+0x60>		.75 -- branch if register >= 0
214:  0000000000	sll zero,zero,0		.75 -- Nop
218:  2411593776	lw fp,48(sp)		 -- epilog| restore 
21c:  0000000000	sll zero,zero,0		 -- Nop
220:  2411659316	lw ra,52(sp)		 -- epilog| restore 
224:  0000000000	sll zero,zero,0		 -- Nop
228:  0666697784	addiu sp,sp,56		 -- epilog| pop stack frame
22c:  0001962017	addu fp,zero,sp		 -- epilog| pop stack frame
230:  0065011720	jr ra		 -- epilog| return
		<partition>:
234:  0666763236	addiu sp,sp,-28		 -- prolog| push stack frame
238:  0001962017	addu fp,zero,sp		 -- prolog|copy fp ← sp
23c:  2948857856	sw a0,0(fp)		.0 -- pop param
240:  2948923396	sw a1,4(fp)		.1 -- pop param
244:  2412904452	lw s2,4(fp)		.2 -- load content from _VH27 in s2
248:  0000000000	sll zero,zero,0		.2 -- Nop
24c:  0001196160	sll t0,s2,2		.3 -- _T30 = _S28 << 2
250:  2366177280	lw t1,0(t0)		.4 -- load content from _G1[_T30] in t1
254:  0000000000	sll zero,zero,0		.4 -- Nop
258:  2949185544	sw t1,8(fp)		.5 -- store content of t1 in _VX33
25c:  2413101056	lw s5,0(fp)		.6 -- load content from _VL25 in s5
260:  0000000000	sll zero,zero,0		.6 -- Nop
264:  0648806399	addiu t3,s5,-1		.7 -- _T35 = _S26 - 1
268:  2949316620	sw t3,12(fp)		.8 -- store content of t3 in _VI36
26c:  2949971984	sw s5,16(fp)		.9 -- store content of s5 in _VJ38
270:  0134217923	j 30c <partition+0xd8>		.10 -- jump to partition+_i7
274:  0000000000	sll zero,zero,0		.10 -- Nop
278:  2412904464	lw s2,16(fp)		.11 -- load content from _VJ38 in s2
27c:  0000000000	sll zero,zero,0		.11 -- Nop
280:  0001204352	sll t4,s2,2		.12 -- _T42 = _S40 << 2
284:  2374828032	lw t5,0(t4)		.13 -- load content from _G1[_T42] in t5
288:  2412773384	lw s0,8(fp)		.14 -- load content from _VX33 in s0
28c:  0000000000	sll zero,zero,0		.14 -- Nop
290:  0028315683	subu v0,t5,s0		.15
294:  0473956377	bgtz v0,2fc <partition+0xc8>		.15 -- branch if register > 0
298:  0000000000	sll zero,zero,0		.15 -- Nop
29c:  2413101068	lw s5,12(fp)		.16 -- load content from _VI36 in s5
2a0:  0000000000	sll zero,zero,0		.16 -- Nop
2a4:  0649396225	addiu s5,s5,1		.17 -- _S46 = _S46 + 1
2a8:  2949971980	sw s5,12(fp)		.18 -- store content of s5 in _VI36
2ac:  0001419297	addu s5,zero,s5		.19 -- copy _S46 ← _S46
2b0:  2949971980	sw s5,12(fp)		.20 -- store content of s5 in _VI36
2b4:  0001407104	sll t7,s5,2		.21 -- _T48 = _S46 << 2
2b8:  2381840384	lw t8,0(t7)		.22 -- load content from _G1[_T48] in t8
2bc:  0000000000	sll zero,zero,0		.22 -- Nop
2c0:  2950168596	sw t8,20(fp)		.23 -- store content of t8 in _VTMP51
2c4:  2412970000	lw s3,16(fp)		.24 -- load content from _VJ38 in s3
2c8:  0000000000	sll zero,zero,0		.24 -- Nop
2cc:  0001261696	sll t0,s3,2		.25 -- _T55 = _S53 << 2
2d0:  2366177280	lw t1,0(t0)		.26 -- load content from _G1[_T55] in t1
2d4:  0001419297	addu s5,zero,s5		.27 -- copy _S46 ← _S46
2d8:  2949971980	sw s5,12(fp)		.28 -- store content of s5 in _VI36
2dc:  0001396864	sll t2,s5,2		.29 -- _T58 = _S46 << 2
2e0:  2907242496	sw t1,0(t2)		.30 -- store content of t1 in _G1[_T58]
2e4:  0001284129	addu s3,zero,s3		.31 -- copy _S53 ← _S53
2e8:  2949840912	sw s3,16(fp)		.32 -- store content of s3 in _VJ38
2ec:  0001267840	sll t3,s3,2		.33 -- _T60 = _S53 << 2
2f0:  2413232148	lw s7,20(fp)		.34 -- load content from _VTMP51 in s7
2f4:  0000000000	sll zero,zero,0		.34 -- Nop
2f8:  2910257152	sw s7,0(t3)		.35 -- store content of s7 in _G1[_T60]
2fc:  2413101072	lw s5,16(fp)		.36 -- load content from _VJ38 in s5
300:  0000000000	sll zero,zero,0		.36 -- Nop
304:  0649396225	addiu s5,s5,1		.37 -- _S61 = _S61 + 1
308:  2949971984	sw s5,16(fp)		.38 -- store content of s5 in _VJ38
30c:  2412904464	lw s2,16(fp)		.39 -- load content from _VJ38 in s2
310:  2412838916	lw s1,4(fp)		.40 -- load content from _VH27 in s1
314:  0000000000	sll zero,zero,0		.40 -- Nop
318:  0038866979	subu v0,s2,s1		.41
31c:  0071368662	bltz v0,278 <partition+0x44>		.41 -- branch if register < 0
320:  0000000000	sll zero,zero,0		.41 -- Nop
324:  2413035532	lw s4,12(fp)		.42 -- load content from _VI36 in s4
328:  0000000000	sll zero,zero,0		.42 -- Nop
32c:  0646840321	addiu t6,s4,1		.43 -- _T65 = _S64 + 1
330:  2949513240	sw t6,24(fp)		.44 -- store content of t6 in _VINDEX66
334:  2413166616	lw s6,24(fp)		.45 -- load content from _VINDEX66 in s6
338:  0000000000	sll zero,zero,0		.45 -- Nop
33c:  0001472640	sll t7,s6,2		.46 -- _T69 = _S67 << 2
340:  2381840384	lw t8,0(t7)		.47 -- load content from _G1[_T69] in t8
344:  0000000000	sll zero,zero,0		.47 -- Nop
348:  2950168596	sw t8,20(fp)		.48 -- store content of t8 in _VTMP51
34c:  2412838916	lw s1,4(fp)		.49 -- load content from _VH27 in s1
350:  0000000000	sll zero,zero,0		.49 -- Nop
354:  0001130624	sll t0,s1,2		.50 -- _T75 = _S73 << 2
358:  2366177280	lw t1,0(t0)		.51 -- load content from _G1[_T75] in t1
35c:  0001486881	addu s6,zero,s6		.52 -- copy _S67 ← _S67
360:  2950037528	sw s6,24(fp)		.53 -- store content of s6 in _VINDEX66
364:  0001462400	sll t2,s6,2		.54 -- _T78 = _S67 << 2
368:  2907242496	sw t1,0(t2)		.55 -- store content of t1 in _G1[_T78]
36c:  0001148961	addu s1,zero,s1		.56 -- copy _S73 ← _S73
370:  2949709828	sw s1,4(fp)		.57 -- store content of s1 in _VH27
374:  0001136768	sll t3,s1,2		.58 -- _T80 = _S73 << 2
378:  2413232148	lw s7,20(fp)		.59 -- load content from _VTMP51 in s7
37c:  0000000000	sll zero,zero,0		.59 -- Nop
380:  2910257152	sw s7,0(t3)		.60 -- store content of s7 in _G1[_T80]
384:  0646774785	addiu t5,s4,1		.61 -- _T81 = _S64 + 1
388:  0000856097	addu v0,zero,t5		.63 -- push return 
38c:  0666697756	addiu sp,sp,28		 -- epilog| pop stack frame
390:  0001962017	addu fp,zero,sp		 -- epilog| pop stack frame
394:  0065011720	jr ra		 -- epilog| return

 */