ivannosys3/src/samples/program_jun_quick.go

// Aplica o back-end do juninho
@target          : mips 
// Especifica o tipo de metodo empregado para salvar o resultado da compilação
//@export          : MultCoreJun
@export          : simulation

// Diretorio onde o resultado da compilação será gravado
@outputDirectory : `C:\Users\EUGENIO CARVALHO\Desktop\tmp\bitCount_1`

// Quantidade de palavras de um bloco 32 palavras de 4bytes
@cacheBlockSize: `32`

/**
    Profile de compilacao do back-end
    O formato da string é um json que descreve um array de definições de cada core
    {
        "stackBaseAddress"   : 5888,     -> endereço da base da pilha do core em questão
        "initFunction": "multiplica(0)", -> define a main de cada core. aceita ate 4 parametros com valores de constantes
        "id": "core0"                    -> label que define o codigo de cada core
    },

    Se "stackBaseAddress" não for definido o compilador irá inferir o valor iniciando do ultimo endereço da memoria    
*/

@profile: `[
    {
        "id"               : "core0",
        "initFunction"     : "bitCount(0)",
        "filename"         : "%s_core_0.txt"
    },
    {
        "id"               : "core1",
        "initFunction"     : "bitCount(18750)",
        "filename"         : "%s_core_1.txt"
    },
    {
        "id"               : "core2",
        "initFunction"     : "bitCount(37500)",
        "filename"         : "%s_core_2.txt"
    },
    {
        "id"               : "core3",
        "initFunction"     : "bitCount(56250)",
        "filename"         : "%s_core_3.txt"
    }
]`

package main;

var (
    result [4][32]int32
)

func bitCount(init int32, core int32){
    var (
        n int32
        x int32
        tmp  = 0
        zero = 0
        seed = 112500
        //seed = 1000
    )

    for i:= init; i < init + 4500; i++ {
        n = 0
	x = seed
        if x > 0 {
            for true {
                n++
                if x = x & (x-1); x == 0 {
                   break
                }
            }
            tmp += n
        }
	seed +=13
    }
    result[core][zero] = tmp
}

func main(){
    bitCount(18750,1)
}

/*

$$$$$$$$$$$$$$$$ SetLoaded:_S6:false
$$$$$$$$$$$$$$$$ SetLoaded:_S8:false
$$$$$$$$$$$$$$$$ SetLoaded:_S10:false
$$$$$$$$$$$$$$$$ SetLoaded:_S12:false
$$$$$$$$$$$$$$$$ LOADED _S2 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S2:true
$$$$$$$$$$$$$$$$ SetLoaded:_S14:false
$$$$$$$$$$$$$$$$ SetLoaded:_S17:false
$$$$$$$$$$$$$$$$ LOADED _S15 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S15:true
$$$$$$$$$$$$$$$$ LOADED _S17 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S17:true
$$$$$$$$$$$$$$$$ LOADED _S18 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S18:true
$$$$$$$$$$$$$$$$ SetLoaded:_S18:false
$$$$$$$$$$$$$$$$ LOADED _S18 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S18:true
$$$$$$$$$$$$$$$$ LOADED _S19 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S19:true
$$$$$$$$$$$$$$$$ LOADED _S19 : true
$$$$$$$$$$$$$$$$ SetLoaded:_S19:false
$$$$$$$$$$$$$$$$ LOADED _S19 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S19:true
$$$$$$$$$$$$$$$$ LOADED _S23 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S23:true
$$$$$$$$$$$$$$$$ LOADED _S22 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S22:true
$$$$$$$$$$$$$$$$ SetLoaded:_S23:false
$$$$$$$$$$$$$$$$ LOADED _S23 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S23:true
$$$$$$$$$$$$$$$$ LOADED _S24 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S24:true
$$$$$$$$$$$$$$$$ SetLoaded:_S24:false
$$$$$$$$$$$$$$$$ LOADED _S24 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S24:true
$$$$$$$$$$$$$$$$ LOADED _S25 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S25:true
$$$$$$$$$$$$$$$$ SetLoaded:_S25:false
$$$$$$$$$$$$$$$$ LOADED _S25 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S25:true
$$$$$$$$$$$$$$$$ LOADED _S27 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S27:true
$$$$$$$$$$$$$$$$ LOADED _S26 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S26:true
$$$$$$$$$$$$$$$$ LOADED _S30 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S30:true
$$$$$$$$$$$$$$$$ LOADED _S30 : true
$$$$$$$$$$$$$$$$ LOADED _S32 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S32:true
$$$$$$$$$$$$$$$$ LOADED _S32 : true
$$$$$$$$$$$$$$$$ SetLoaded:_S36[_T34]:false
$$$$$$$$$$$$$$$$ LOADED _S29 : false
$$$$$$$$$$$$$$$$ SetLoaded:_S29:true

package main

import (
	"fmt"
)

var (
    result [4][32]int
)

func bitCount(init int, core int){
    var (
        n int
        x int
        tmp  = 0
        seed = 112500
    )

    for i:= init; i < init + 4500; i++ {
        n = 0
	x = seed
	fmt.Println("X: ", x)
        if x > 0 {
            for true {
                n++
                if x = x & (x-1); x == 0 {
                   break
                }
            }
            tmp += n
        }
	seed +=13
    }
    fmt.Println(tmp)
}
*/

/**	
		<main>:
  0:  0604260670	addiu a0,zero,18750		.2 -- push param
  4:  0604307457	addiu a1,zero,1		.2 -- push param
  8:  0201326597	jal 14 <bitCount+0x0>		.2 -- jump to <bitCount>
  c:  0000000000	sll zero,zero,0		.2 -- Nop
 10:  4294967295	stop 		 -- End of programa
		<bitCount>:
 14:  0666763232	addiu sp,sp,-32		 -- prolog| push stack frame
 18:  0001962017	addu fp,zero,sp		 -- prolog|copy fp ← sp
 1c:  2948857856	sw a0,0(fp)		.0 -- pop param
 20:  2948923396	sw a1,4(fp)		.1 -- pop param
 24:  2948595720	sw zero,8(fp)		.2 -- store content of zero in _VTMP5
 28:  2948595724	sw zero,12(fp)		.3 -- store content of zero in _VZERO7
 2c:  0604636136	addiu t2,zero,1000		.4 -- load param (p1)
 30:  2949251088	sw t2,16(fp)		.4 -- store content of t2 in _VSEED9
 34:  2413101056	lw s5,0(fp)		.5 -- load content from _VINIT1 in s5
 38:  0000000000	sll zero,zero,0		.5 -- Nop
 3c:  2949971988	sw s5,20(fp)		.6 -- store content of s5 in _VI11
 40:  0134217795	j 10c <bitCount+0xf8>		.7 -- jump to bitCount+_i3
 44:  0000000000	sll zero,zero,0		.7 -- Nop
 48:  2948595736	sw zero,24(fp)		.8 -- store content of zero in _VN13
 4c:  2412904464	lw s2,16(fp)		.9 -- load content from _VSEED9 in s2
 50:  0000000000	sll zero,zero,0		.9 -- Nop
 54:  2949775388	sw s2,28(fp)		.10 -- store content of s2 in _VX16
 58:  2413035548	lw s4,28(fp)		.11 -- load content from _VX16 in s4
 5c:  0000000000	sll zero,zero,0		.11 -- Nop
 60:  0041947171	subu v0,s4,zero		.12
 64:  0406847517	blez v0,dc <bitCount+0xc8>		.12 -- branch if register <= 0
 68:  0000000000	sll zero,zero,0		.12 -- Nop
 6c:  0134217774	j b8 <bitCount+0xa4>		.13 -- jump to bitCount+_i9
 70:  0000000000	sll zero,zero,0		.13 -- Nop
 74:  2413101080	lw s5,24(fp)		.14 -- load content from _VN13 in s5
 78:  0000000000	sll zero,zero,0		.14 -- Nop
 7c:  0649396225	addiu s5,s5,1		.15 -- _S18 = _S18 + 1
 80:  2413101080	lw s5,24(fp)		.16 -- load content from _VN13 in s5
 84:  0000000000	sll zero,zero,0		.16 -- Nop
 88:  2949971992	sw s5,24(fp)		.17 -- store content of s5 in _VN13
 8c:  2413232156	lw s7,28(fp)		.18 -- load content from _VX16 in s7
 90:  0000000000	sll zero,zero,0		.18 -- Nop
 94:  0653262847	addiu t7,s7,-1		.19 -- _T20 = _S19 - 1
 98:  0049266724	and t8,s7,t7		.20 -- _T21 = _S19 & _T20
 9c:  2950168604	sw t8,28(fp)		.21 -- store content of t8 in _VX16
 a0:  2413232156	lw s7,28(fp)		.22 -- load content from _VX16 in s7
 a4:  0000000000	sll zero,zero,0		.22 -- Nop
 a8:  0383778819	bne zero,s7,b8 <bitCount+0xa4>		.23 -- branch if not equals
 ac:  0000000000	sll zero,zero,0		.23 -- Nop
 b0:  0134217776	j c0 <bitCount+0xac>		.24 -- jump to bitCount+_i7
 b4:  0000000000	sll zero,zero,0		.24 -- Nop
 b8:  0134217757	j 74 <bitCount+0x60>		.25 -- jump to bitCount+_i6
 bc:  0000000000	sll zero,zero,0		.25 -- Nop
 c0:  2412904456	lw s2,8(fp)		.26 -- load content from _VTMP5 in s2
 c4:  2413035544	lw s4,24(fp)		.27 -- load content from _VN13 in s4
 c8:  0000000000	sll zero,zero,0		.27 -- Nop
 cc:  0039096353	addu s2,s2,s4		.28 -- _S23 = _S23 + _S22
 d0:  2412904456	lw s2,8(fp)		.29 -- load content from _VTMP5 in s2
 d4:  0000000000	sll zero,zero,0		.29 -- Nop
 d8:  2949775368	sw s2,8(fp)		.30 -- store content of s2 in _VTMP5
 dc:  2412773392	lw s0,16(fp)		.31 -- load content from _VSEED9 in s0
 e0:  0000000000	sll zero,zero,0		.31 -- Nop
 e4:  0638582797	addiu s0,s0,13		.32 -- _S24 = _S24 + 13
 e8:  2412773392	lw s0,16(fp)		.33 -- load content from _VSEED9 in s0
 ec:  0000000000	sll zero,zero,0		.33 -- Nop
 f0:  2949644304	sw s0,16(fp)		.34 -- store content of s0 in _VSEED9
 f4:  2413232148	lw s7,20(fp)		.35 -- load content from _VI11 in s7
 f8:  0000000000	sll zero,zero,0		.35 -- Nop
 fc:  0653721601	addiu s7,s7,1		.36 -- _S25 = _S25 + 1
100:  2413232148	lw s7,20(fp)		.37 -- load content from _VI11 in s7
104:  0000000000	sll zero,zero,0		.37 -- Nop
108:  2950103060	sw s7,20(fp)		.38 -- store content of s7 in _VI11
10c:  2413035520	lw s4,0(fp)		.39 -- load content from _VINIT1 in s4
110:  0000000000	sll zero,zero,0		.39 -- Nop
114:  0646713748	addiu t4,s4,4500		.40 -- _T28 = _S27 + 4500
118:  2412838932	lw s1,20(fp)		.41 -- load content from _VI11 in s1
11c:  0000000000	sll zero,zero,0		.41 -- Nop
120:  0036442147	subu v0,s1,t4		.42
124:  0071368648	bltz v0,48 <bitCount+0x34>		.42 -- branch if register < 0
128:  0000000000	sll zero,zero,0		.42 -- Nop
12c:  2413101060	lw s5,4(fp)		.43 -- load content from _VCORE3 in s5
130:  0000000000	sll zero,zero,0		.43 -- Nop
134:  0001403200	sll t5,s5,5		.44 -- _T31 = _S30 << 5
138:  2413166604	lw s6,12(fp)		.45 -- load content from _VZERO7 in s6
13c:  0000000000	sll zero,zero,0		.45 -- Nop
140:  0028731425	addu t5,t5,s6		.46 -- _T31 = _T31 + _S32
144:  0000880768	sll t6,t5,2		.47 -- _T34 = _T31 << 2
148:  2413035528	lw s4,8(fp)		.48 -- load content from _VTMP5 in s4
14c:  0000000000	sll zero,zero,0		.48 -- Nop
150:  2916352000	sw s4,0(t6)		.49 -- store content of s4 in _G35[_T34]
154:  0666697760	addiu sp,sp,32		 -- epilog| pop stack frame
158:  0001962017	addu fp,zero,sp		 -- epilog| pop stack frame
15c:  0065011720	jr ra		 -- epilog| return


Target[mips]:
	<main>:
  0:  0604260670	addiu a0,zero,18750		.2 -- push param
  4:  0604307457	addiu a1,zero,1		.2 -- push param
  8:  0201326597	jal 14 <bitCount+0x0>		.2 -- jump to <bitCount>
  c:  0000000000	sll zero,zero,0		.2 -- Nop
 10:  4294967295	stop 		 -- End of programa
		<bitCount>:
 14:  0666763232	addiu sp,sp,-32		 -- prolog| push stack frame
 18:  0001962017	addu fp,zero,sp		 -- prolog|copy fp ← sp
 1c:  2948857856	sw a0,0(fp)		.0 -- pop param
 20:  2948923396	sw a1,4(fp)		.1 -- pop param
 24:  2948595720	sw zero,8(fp)		.2 -- store content of zero in _VTMP5
 28:  2948595724	sw zero,12(fp)		.3 -- store content of zero in _VZERO7
 2c:  0604636136	addiu t2,zero,1000		.4 -- load param (p1)
 30:  2949251088	sw t2,16(fp)		.4 -- store content of t2 in _VSEED9
 34:  2413101056	lw s5,0(fp)		.5 -- load content from _VINIT1 in s5
 38:  0000000000	sll zero,zero,0		.5 -- Nop
 3c:  2949971988	sw s5,20(fp)		.6 -- store content of s5 in _VI11
 40:  0134217785	j e4 <bitCount+0xd0>		.7 -- jump to bitCount+_i3
 44:  0000000000	sll zero,zero,0		.7 -- Nop
 48:  2948595736	sw zero,24(fp)		.8 -- store content of zero in _VN13
 4c:  2412904464	lw s2,16(fp)		.9 -- load content from _VSEED9 in s2
 50:  0000000000	sll zero,zero,0		.9 -- Nop
 54:  2949775388	sw s2,28(fp)		.10 -- store content of s2 in _VX16
 58:  2413035548	lw s4,28(fp)		.11 -- load content from _VX16 in s4
 5c:  0000000000	sll zero,zero,0		.11 -- Nop
 60:  0041947171	subu v0,s4,zero		.12
 64:  0406847511	blez v0,c4 <bitCount+0xb0>		.12 -- branch if register <= 0
 68:  0000000000	sll zero,zero,0		.12 -- Nop
 6c:  0134217770	j a8 <bitCount+0x94>		.13 -- jump to bitCount+_i9
 70:  0000000000	sll zero,zero,0		.13 -- Nop
 
 74:  2413101080	lw s5,24(fp)		.14 -- load content from _VN13 in s5
 78:  0000000000	sll zero,zero,0		.14 -- Nop
 7c:  0649396225	addiu s5,s5,1		.15 -- _S18 = _S18 + 1
 80:  2949971992	sw s5,24(fp)		.16 -- store content of s5 in _VN13
 84:  2413232156	lw s7,28(fp)		.17 -- load content from _VX16 in s7
 88:  0000000000	sll zero,zero,0		.17 -- Nop
 8c:  0653262847	addiu t7,s7,-1		.18 -- _T20 = _S19 - 1
 90:  0049266724	and t8,s7,t7		.19 -- _T21 = _S19 & _T20
 94:  2950168604	sw t8,28(fp)		.20 -- store content of t8 in _VX16
 98:  0383778819	bne zero,s7,a8 <bitCount+0x94>		.21 -- branch if not equals
 
 9c:  0000000000	sll zero,zero,0		.21 -- Nop
 a0:  0134217772	j b0 <bitCount+0x9c>		.22 -- jump to bitCount+_i7
 a4:  0000000000	sll zero,zero,0		.22 -- Nop
 a8:  0134217757	j 74 <bitCount+0x60>		.23 -- jump to bitCount+_i6
 ac:  0000000000	sll zero,zero,0		.23 -- Nop
 b0:  2412904456	lw s2,8(fp)		.24 -- load content from _VTMP5 in s2
 b4:  2413035544	lw s4,24(fp)		.25 -- load content from _VN13 in s4
 b8:  0000000000	sll zero,zero,0		.25 -- Nop
 bc:  0039096353	addu s2,s2,s4		.26 -- _S23 = _S23 + _S22
 c0:  2949775368	sw s2,8(fp)		.27 -- store content of s2 in _VTMP5
 
 c4:  2412773392	lw s0,16(fp)		.28 -- load content from _VSEED9 in s0
 c8:  0000000000	sll zero,zero,0		.28 -- Nop
 cc:  0638582797	addiu s0,s0,13		.29 -- _S24 = _S24 + 13
 d0:  2949644304	sw s0,16(fp)		.30 -- store content of s0 in _VSEED9
 d4:  2413232148	lw s7,20(fp)		.31 -- load content from _VI11 in s7
 d8:  0000000000	sll zero,zero,0		.31 -- Nop
 dc:  0653721601	addiu s7,s7,1		.32 -- _S25 = _S25 + 1
 e0:  2950103060	sw s7,20(fp)		.33 -- store content of s7 in _VI11
 e4:  2413035520	lw s4,0(fp)		.34 -- load content from _VINIT1 in s4
 e8:  0000000000	sll zero,zero,0		.34 -- Nop
 ec:  0646713748	addiu t4,s4,4500		.35 -- _T28 = _S27 + 4500
 f0:  2412838932	lw s1,20(fp)		.36 -- load content from _VI11 in s1
 f4:  0000000000	sll zero,zero,0		.36 -- Nop
 f8:  0036442147	subu v0,s1,t4		.37
 fc:  0071368658	bltz v0,48 <bitCount+0x34>		.37 -- branch if register < 0
100:  0000000000	sll zero,zero,0		.37 -- Nop
104:  2413101060	lw s5,4(fp)		.38 -- load content from _VCORE3 in s5
108:  0000000000	sll zero,zero,0		.38 -- Nop
10c:  0001403200	sll t5,s5,5		.39 -- _T31 = _S30 << 5
110:  2413166604	lw s6,12(fp)		.40 -- load content from _VZERO7 in s6
114:  0000000000	sll zero,zero,0		.40 -- Nop
118:  0028731425	addu t5,t5,s6		.41 -- _T31 = _T31 + _S32
11c:  0000880768	sll t6,t5,2		.42 -- _T34 = _T31 << 2
120:  2413035528	lw s4,8(fp)		.43 -- load content from _VTMP5 in s4
124:  0000000000	sll zero,zero,0		.43 -- Nop
128:  2916352000	sw s4,0(t6)		.44 -- store content of s4 in _G35[_T34]
12c:  0666697760	addiu sp,sp,32		 -- epilog| pop stack frame
130:  0001962017	addu fp,zero,sp		 -- epilog| pop stack frame
134:  0065011720	jr ra		 -- epilog| return


		<main>:
  0:  0604522814	addiu t0,zero,18750		.2 -- load param (p1)
  4:  0604260670	addiu a0,zero,18750		.2 -- push param
  8:  0604569601	addiu t1,zero,1		.2 -- load param (p1)
  c:  0604307457	addiu a1,zero,1		.2 -- push param
 10:  0201326599	jal 1c <bitCount+0x0>		.2 -- jump to <bitCount>
 14:  0000000000	sll zero,zero,0		.2 -- Nop
 18:  4294967295	stop 		 -- End of programa
		<bitCount>:
 1c:  0666763232	addiu sp,sp,-32		 -- prolog| push stack frame
 20:  0001962017	addu fp,zero,sp		 -- prolog|copy fp ← sp
 24:  2412773376	lw s0,fp,0		.0 -- load content from _V1 in s0
 28:  0000000000	sll zero,zero,0		.0 -- Nop
 2c:  2948857856	sw a0,fp,0		.1 -- pop param
 30:  2412838916	lw s1,fp,4		.2 -- load content from _V2 in s1
 34:  0000000000	sll zero,zero,0		.2 -- Nop
 38:  2948923396	sw a1,fp,4		.3 -- pop param
 3c:  0605159424	addiu s2,zero,0		.4 -- copy _V3 ← 0
 40:  2949775368	sw s2,fp,8		.5 -- store content of s2 in _V3
 44:  0605224960	addiu s3,zero,0		.6 -- copy _V4 ← 0
 48:  2949840908	sw s3,fp,12		.7 -- store content of s3 in _V4
 4c:  1007943681	lui s4,1		.8 -- load param upper(p1)
 50:  0915715956	ori s4,s4,46964		.8 -- load param lower(p1)
 54:  2949906448	sw s4,fp,16		.9 -- store content of s4 in _V5
 58:  2412773376	lw s0,fp,0		.10 -- load content from _V1 in s0
 5c:  0000000000	sll zero,zero,0		.10 -- Nop
 60:  0001091617	addu s5,zero,s0		.11 -- copy _V6 ← _V1
 64:  2949971988	sw s5,fp,20		.12 -- store content of s5 in _V6
 68:  0134217805	j 134 <bitCount+0x118>		.13 -- jump to bitCount+_i3
 6c:  0000000000	sll zero,zero,0		.13 -- Nop
 70:  0605421568	addiu s6,zero,0		.14 -- copy _V7 ← 0
 74:  2950037528	sw s6,fp,24		.15 -- store content of s6 in _V7
 78:  2413232144	lw s7,fp,16		.16 -- load content from _V5 in s7
 7c:  0000000000	sll zero,zero,0		.16 -- Nop
 80:  0001542177	addu s1,zero,s7		.17 -- copy _V8 ← _V5
 84:  2949709852	sw s1,fp,28		.18 -- store content of s1 in _V8
 88:  2412838940	lw s1,fp,28		.19 -- load content from _V8 in s1
 8c:  0000000000	sll zero,zero,0		.19 -- Nop
 90:  0035655715	subu v0,s1,zero		.20
 94:  0406847517	blez zero,v0,10c <bitCount+0xf0>		.20 -- branch if register <= 0
 98:  0000000000	sll zero,zero,0		.20 -- Nop
 9c:  0134217788	j f0 <bitCount+0xd4>		.21 -- jump to bitCount+_i9
 a0:  0000000000	sll zero,zero,0		.21 -- Nop
 a4:  2412904472	lw s2,fp,24		.22 -- load content from _V7 in s2
 a8:  0000000000	sll zero,zero,0		.22 -- Nop
 ac:  0604831745	addiu t5,zero,1		.23 -- load param (p2)
 b0:  0642908161	addiu s2,s2,1		.23 -- _V7 = _V7 + 1
 b4:  2949775384	sw s2,fp,24		.24 -- store content of s2 in _V7
 b8:  2412970012	lw s3,fp,28		.25 -- load content from _V8 in s3
 bc:  0000000000	sll zero,zero,0		.25 -- Nop
 c0:  0604897281	addiu t6,zero,1		.26 -- load param (p2)
 c4:  0644874239	addiu t7,s3,-1		.26 -- _T9 = _V8 - 1
 c8:  2412970012	lw s3,fp,28		.27 -- load content from _V8 in s3
 cc:  0000000000	sll zero,zero,0		.27 -- Nop
 d0:  0040867876	and s3,s3,t7		.28 -- _V8 = _V8 & _T9
 d4:  2949840924	sw s3,fp,28		.29 -- store content of s3 in _V8
 d8:  2412970012	lw s3,fp,28		.30 -- load content from _V8 in s3
 dc:  0000000000	sll zero,zero,0		.30 -- Nop
 e0:  0375390211	bne zero,s3,f0 <bitCount+0xd4>		.31 -- branch if not equals
 e4:  0000000000	sll zero,zero,0		.31 -- Nop
 e8:  0134217790	j f8 <bitCount+0xdc>		.32 -- jump to bitCount+_i7
 ec:  0000000000	sll zero,zero,0		.32 -- Nop
 f0:  0134217769	j a4 <bitCount+0x88>		.33 -- jump to bitCount+_i6
 f4:  0000000000	sll zero,zero,0		.33 -- Nop
 f8:  2413035528	lw s4,fp,8		.34 -- load content from _V3 in s4
 fc:  2412773400	lw s0,fp,24		.35 -- load content from _V7 in s0
100:  0000000000	sll zero,zero,0		.35 -- Nop
104:  0043032609	addu s4,s4,s0		.36 -- _V3 = _V3 + _V7
108:  2949906440	sw s4,fp,8		.37 -- store content of s4 in _V3
10c:  2413101072	lw s5,fp,16		.38 -- load content from _V5 in s5
110:  0000000000	sll zero,zero,0		.38 -- Nop
114:  0604504077	addiu t0,zero,13		.39 -- load param (p2)
118:  0649396237	addiu s5,s5,13		.39 -- _V5 = _V5 + 13
11c:  2949971984	sw s5,fp,16		.40 -- store content of s5 in _V5
120:  2413166612	lw s6,fp,20		.41 -- load content from _V6 in s6
124:  0000000000	sll zero,zero,0		.41 -- Nop
128:  0604569601	addiu t1,zero,1		.42 -- load param (p2)
12c:  0651558913	addiu s6,s6,1		.42 -- _V6 = _V6 + 1
130:  2950037524	sw s6,fp,20		.43 -- store content of s6 in _V6
134:  2413232128	lw s7,fp,0		.44 -- load content from _V1 in s7
138:  0000000000	sll zero,zero,0		.44 -- Nop
13c:  0604639636	addiu t2,zero,4500		.45 -- load param (p2)
140:  0652939668	addiu t3,s7,4500		.45 -- _T11 = _V1 + 4500
144:  2412838932	lw s1,fp,20		.46 -- load content from _V6 in s1
148:  0000000000	sll zero,zero,0		.46 -- Nop
14c:  0036376611	subu v0,s1,t3		.47
150:  0071368647	bltz 00000,v0,70 <bitCount+0x54>		.47 -- branch if register < 0
154:  0000000000	sll zero,zero,0		.47 -- Nop
158:  2412904452	lw s2,fp,4		.48 -- load content from _V2 in s2
15c:  0000000000	sll zero,zero,0		.48 -- Nop
160:  0001204257	addu t4,zero,s2		.49 -- copy _T12 ← _V2
164:  0000813376	sll t5,t4,5		.50 -- _T13 = _T12 << 5
168:  2412969996	lw s3,fp,12		.51 -- load content from _V4 in s3
16c:  0000000000	sll zero,zero,0		.51 -- Nop
170:  0001273889	addu t6,zero,s3		.52 -- copy _T15 ← _V4
174:  0028207137	addu t5,t5,t6		.53 -- _T13 = _T13 + _T15
178:  0000882816	sll t7,t5,2		.54 -- _T19 = _T13 << 2
17c:  2412773384	lw s0,fp,8		.55 -- load content from _V3 in s0
180:  0000000000	sll zero,zero,0		.55 -- Nop
184:  2918449152	sw s4,t7,0		.57 -- store content of s4 in _G21[_T19]
188:  0666697760	addiu sp,sp,32		 -- epilog| pop stack frame
18c:  0001962017	addu fp,zero,sp		 -- epilog| pop stack frame
190:  0065011720	jr ra		 -- epilog| return	  T< store >	
*/